/*
 * Copyright (c) 2017 Trail of Bits, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

/* INS  <Vd>.<Ts>[<index>], <R><n> */
TEST_BEGIN(INS_ASIMDINS_IR_R_B, ins_ir_r_b, 1)
TEST_INPUTS(0)
  mov w3, #255
  ins v1.b[3], w3
TEST_END

TEST_BEGIN(INS_ASIMDINS_IR_R_H, ins_ir_r_h, 1)
TEST_INPUTS(0)
  mov w3, #255
  ins v1.h[3], w3
TEST_END

TEST_BEGIN(INS_ASIMDINS_IR_R_S, ins_ir_r_s, 1)
TEST_INPUTS(0)
  mov w3, #255
  ins v1.s[3], w3
TEST_END

TEST_BEGIN(INS_ASIMDINS_IR_R_D, ins_ir_r_d, 1)
TEST_INPUTS(0)
  mov x3, #255
  ins v1.d[1], x3
TEST_END
